must be true for working Ethercat state INIT Ethercat state PREOP Ethercat state SAFEOP Ethercat state OP Number ofconfigured Ethercat devices If Topology is not OK check the name which Slave is missing SlaveName which are missing in case of Topology not OK Instance name of the fieldbus master result of the FB is number of configured slaves EtherCAT address of the EtherCAT device strSlaveName: STRING; --------------------------------------------------------------------------------------------------------------------------------------- Short description: This Functionblock reads the diagnostic information from Ethercat-Master and monitored status and errors. Version: 1.00 Name: DC-AE/STS2 Dirk Asendorf Date: 2023.17.11 Company: Bosch-Rexroth AG --------------------------------------------------------------------------------------------------------------------------------------- Target: ctrlX CORE (EtherCat) Needs: CXA_EthercatMaster Library History --------------------------------------------------------------------------------------------------------------------------------------- Dirk Asendorf | 17.11.2023 | Version 1V00 regeneration --------------------------------------------------------------------------------------------------------------------------------------- --------------------------------------------------------------------------------------------------------------------------------------- Functional Description: This Functionblock shows the modes of Ethercat-Master (Init, PreOP, SafeOp and OP. In case of a wiring problem, like Ethercat-cable break, the bit bTopologyNotOk is set and the variable strSlaveName shows the name of the device. If the problem fixed a automaticly restart was done to reach the Ethercat state OP. --------------------------------------------------------------------------------------------------------------------------------------- IF bEnable THEN // read cyclic Ethercat-Master-Staus fbIL_ECATMasterState.Execute:= NOT fbIL_ECATMasterState.Done; fbIL_ECATMasterState.MasterName := ADR(strMasterName); fbIL_ECATMasterState(); IF TRUE = fbIL_ECATMasterState.Done THEN stMasterStatus.StateDWord := fbIL_ECATMasterState.State; // FB finished . master status is in output "state". IF( 0 = stMasterStatus.StateDWord)THEN // Bus is running without errors ; ELSE // Bus error handling IF(TRUE = stMasterStatus.StateBits.TopologyNotOk)THEN udiErrCtrTopologyNotOk := udiErrCtrTopologyNotOk + 1; END_IF END_IF END_IF IF TRUE = fbIL_ECATMasterState.Error THEN ; // Error handling END_IF // read number of configured devices this is necessary to find out the name of device which has an error fbIL_ECATGetNumConfigSlaves.Execute:= stMasterStatus.StateBits.TopologyNotOk; fbIL_ECATGetNumConfigSlaves.MasterName := ADR(strMasterName); fbIL_ECATGetNumConfigSlaves(); IF TRUE = fbIL_ECATGetNumConfigSlaves.Done THEN udiNumConfigSlaves := fbIL_ECATGetNumConfigSlaves.NumConfigSlaves; // FB finished. Result of the FB is number of configured slaves END_IF IF TRUE = fbIL_ECATGetNumConfigSlaves.Error THEN ; // Error handling END_IF IF uiEthercatAddr = (uiEthercatAddr + fbIL_ECATGetNumConfigSlaves.NumConfigSlaves) THEN uiEthercatAddr:= 1001; END_IF // the name of the device which has in error IF stMasterStatus.StateBits.TopologyNotOk AND fbIL_ECATGetNumConfigSlaves.Done THEN bTopologyNotOK:= TRUE; fbIL_ECATGetSlaveConfigInfo.Execute:= TRUE; fbIL_ECATGetSlaveConfigInfo.MasterName := ADR(strMasterName); fbIL_ECATGetSlaveConfigInfo.SlaveAddress := uiEthercatAddr; IF TRUE = fbIL_ECATGetSlaveConfigInfo.Done THEN ;// FB finished. Result of the FB is configuration information of the slave in fbIL_ECATGetSlaveConfigInfo.SlaveConfigInfo. IF NOT fbIL_ECATGetSlaveConfigInfo.SlaveConfigInfo.IsPresent THEN strSlaveName:=fbIL_ECATGetSlaveConfigInfo.SlaveConfigInfo.SlaveName; ELSE uiEthercatAddr:= uiEthercatAddr + 1; END_IF fbIL_ECATGetSlaveConfigInfo.Execute:= FALSE; END_IF IF TRUE = fbIL_ECATGetSlaveConfigInfo.Error THEN fbIL_ECATGetSlaveConfigInfo.Execute:= FALSE; ; // Error handling END_IF ELSE strSlaveName:= ''; bTopologyNotOK:= FALSE; fbIL_ECATGetSlaveConfigInfo.Execute:= FALSE; END_IF fbIL_ECATGetSlaveConfigInfo(); IF (strSlaveNameOld <> strSlaveName) // if the topolgy ok switch the master to OP OR (stMasterStatus.StateBits.SlavesNotInMasterState AND stMasterStatus.StateBits.SlavesError) // if the error of the device gone switch the master to OP THEN fbECATMasterSetBusState.Execute := TRUE; END_IF IF fbECATMasterSetBusState.Done OR fbECATMasterSetBusState.Error THEN fbECATMasterSetBusState.Execute := FALSE; END_IF fbECATMasterSetBusState.MasterName := ADR(strMasterName); fbECATMasterSetBusState.NewBusState := IL_ECAT_STATE.ECAT_STATE_OP; fbECATMasterSetBusState(); IF TRUE = fbECATMasterSetBusState.Done THEN ; // master reached operational state. END_IF IF TRUE = fbECATMasterSetBusState.Error THEN ; // error handling END_IF IF NOT stMasterStatus.StateBits.NotInStateOp THEN EthercatStateOP:=TRUE; EthercatStateINIT:= FALSE; EthercatStatePreOP:= FALSE; EthercatStateSafeOP:= FALSE; ELSE EthercatStateINIT:= stMasterStatus.StateBits.StateInit; EthercatStatePreOP:= stMasterStatus.StateBits.StatePreOp; EthercatStateSafeOP:= stMasterStatus.StateBits.StateSafeOp; EthercatStateOP:=FALSE; END_IF END_IF 1d3e40bc-0d9b-485c-bb1a-6b9b833f45cd